Thesis

A Silicon p-i-n Detector for a Hybrid CMOS Imaging System

Christopher Shea's RIT thesis documents Cee® resist coating and development in fabrication of a silicon image sensor for a hybrid CMOS imaging system.

How Cee® equipment is used

The fabrication traveler names a Cee® 100 resist spinner for Microprime P20 and HPR 504 processing, and a Cee® 100 developer for development steps. The silicon detector arrays are subsequently hybridized with CMOS readout circuitry. The Cee® attribution concerns lithography.

Equipment reported
Cee® 100 Resist Spinner and Cee® 100 Developer
Source type
Thesis
Publication year
2012
Materials
Photoresist
Substrate
Si
Source
RIT ScholarWorks

Process context

The process details describe the cited work. Reported recipes and results depend on the authors’ materials, substrates, and equipment configuration. Materials recorded for this reference include Photoresist.

Source and equipment evidence

RIT ScholarWorks. 2012. A Silicon p-i-n Detector for a Hybrid CMOS Imaging System.

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Application summary prepared by Cee. The original source remains the authority for its methods and findings.

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