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SOP / protocolCee® 200CBX2015
MIT Fabtools
This process document describes spray and puddle development plus post-exposure, image-reversal and hard bakes. The workflow uses Cee® 200CBX.
LithographyCD-26 developerDeveloperDI Water
Citation & equipment evidence
Source reference
Payer K. 2015. develop-Brewer Hotplate and Develop Station Standard Operating Procedure. Massachusetts Institute of Technology. October 2015.
Equipment evidence
The source names the installation Cee 200CBX and describes a developer and hotplate workflow. Its documented process role is retained rather than inferring a coater configuration from the model name.
Source location: Page 1, Model, Purpose, Author, and Introduction.
SOP / protocolApogee® Spin Coater; Cee® developer
LNF Wiki, University of Michigan Lurie Nanofabrication Facility
This process document describes PMGI lift-off underlayer coating and subsequent photoresist development. The workflow uses Apogee® Spin Coater; Cee® developer.
LithographyDeveloperPhotoresist
Citation & equipment evidence
Source reference
LNF Wiki, University of Michigan Lurie Nanofabrication Facility. PMGI SF 6 lift-off process – LNF
Equipment evidence
Recipe gives Apogee spin conditions for350nm PMGI and CEE puddle-development steps.
Facility / company referenceCee 200X; Apogee spin developer
Naval Postgraduate School Center for Materials Research
This source documents MEMS coating and development at Naval Postgraduate School.
LithographyMicrofabricationPhotoresist
Citation & equipment evidence
Source reference
Naval Postgraduate School Center for Materials Research. Cleanroom – Center for Materials Research – Naval Postgraduate School
Equipment evidence
The Naval Postgraduate School describes a Cee® 200X coater and an Apogee® spin developer in its MEMS cleanroom. The recorded source does not establish the developer's model size.
PatentCee 200CB; Cee 200FX Developer with Prosys megasonic transducer
Brewer Science — Published Patent Examples
The patent reports coat-bake and megasonic-assisted development for multilayer patterning.
MicrofabricationDeveloperPhotoresist
Citation & equipment evidence
Source reference
Brewer Science — Published Patent Examples. Methods of producing structures using a developer-soluble layer with multilayer technology
Equipment evidence
Brewer Science's patent examples identify a Cee® 200CB for coat-bake processing and a Cee® 200FX Developer fitted with a Prosys megasonic transducer for development. The examples investigate multilayer patterning with a developer-soluble layer.
Facility / company referenceCee developer; model unspecified
RIT Semiconductor Nanofabrication Laboratory
This source documents CD-26 photoresist development at RIT; archived instructions.
LithographyMicrofabricationCD-26 developer
Citation & equipment evidence
Source reference
RIT Semiconductor Nanofabrication Laboratory. CEE Resist Developer – Semiconductor Nanofabrication Laboratory – Confluence
Equipment evidence
RIT's archived procedure identifies a Cee® resist developer using CD-26 chemistry. The source provides historical operating instructions; it does not establish the current facility configuration.
ThesisCee® 200X and Cee® 200XD2014
Istanbul Technical University Thesis
Zeliha Özdoğan's thesis documents Cee® 200X coating and Cee® 200XD development while optimizing submicron photolithography on polysilicon.
LithographyMicrofabricationAntireflective CoatingPhotoresist
Citation & equipment evidence
Source reference
Istanbul Technical University Thesis. 2014. Optimization of 0.3 µm Photolithography Process Steps on Polysilicon
Equipment evidence
The method identifies a Cee® 200X for automated photoresist dispense and manually dispensed bottom antireflective coating. A Cee® 200XD performs development. The work optimizes the lithography sequence for 0.3 µm patterning with 365 nm exposure.
ThesisCee® 100 Resist Spinner and Cee® 100 Developer2012
RIT ScholarWorks
Christopher Shea's RIT thesis documents Cee® resist coating and development in fabrication of a silicon image sensor for a hybrid CMOS imaging system.
LithographySensorPhotoresist
Citation & equipment evidence
Source reference
RIT ScholarWorks. 2012. A Silicon p-i-n Detector for a Hybrid CMOS Imaging System
Equipment evidence
The fabrication traveler names a Cee® 100 resist spinner for Microprime P20 and HPR 504 processing, and a Cee® 100 developer for development steps. The silicon detector arrays are subsequently hybridized with CMOS readout circuitry. The Cee® attribution concerns lithography.
SOP / protocolX-Pro II Workstation2025
George Mason University Nanofabrication Facility
George Mason University's Nanofabrication Facility uses Cee® X-Pro II Workstations for photoresist coating, baking and development. Separate positive- and negative-resist workstations support the facility's photolithography workflow.
LithographyNanofabricationOpen FacilityPhotoresist
Citation & equipment evidence
Source reference
George Mason University Nanofabrication Facility. 2025. Standard Operating Procedure: Photoresist Workstation, Cee X-Pro II. December 2025.
Equipment evidence
The SOP identifies the Cee® X-Pro II Workstation. Individual module sizes are not specified; a separate instrument performs exposure.
Source location: Page 1, document identification; workstation description and operating sections.
Facility / company referenceApogee® Spin Developer
AggieFab (Texas A&M University)
Texas A&M AggieFab lists a Cee® Automatic Developer used for photoresist development following exposure, supporting lithography workflows in a university cleanroom.
NanofabricationOpen FacilityAZ400KDeveloperDI Water
Citation & equipment evidence
Source reference
AggieFab (Texas A&M University). Cee® Automatic Developer – Texas A&M AggieFab
Equipment evidence
This Texas A&M AggieFab equipment page identifies a Cee® Automatic Developer used for post-exposure photoresist processing within the facility. The system is integrated into lithography workflows, where exposed photoresist is developed using controlled chemical processing to define patterned features. The page ties the developer directly to standard cleanroom operations, supporting consistent and repeatable development steps following coating and exposure. This makes it a strong facility-level reference showing use of Cee® equipment beyond coating, extending into automated development processes within academic nanofabrication environments.
Facility / company referenceApogee® Bake Plate; Apogee® Spin Coater; Apogee® Spin Developer2025
AggieFab (Texas A&M University)
The AggieFab facility at Texas A&M utilizes a complete Cee® lithography workflow, including spin coating, bake, and develop systems, to support a wide range of thin-film and photolithographic processes in a shared research environment.
LithographyNanofabricationOpen FacilityPhotoresistPMMA
Citation & equipment evidence
Source reference
AggieFab (Texas A&M University). 2025. Cee® Apogee® Lithography Workflow – AggieFab Nanofabrication Facility
Equipment evidence
The AggieFab nanofabrication facility incorporates a full Cee® lithography workflow, integrating spin coating, thermal processing, and development within a shared cleanroom environment. Spin coating systems are used to apply SU-8 for structural layers, AZ-series photoresists such as AZ3310 and S18xx for photolithographic patterning, polyimide for insulating films, and PMMA for electron-beam lithography processes. Following coating, substrates are transferred to Cee® bake plates for controlled soft bake and post-exposure bake steps, and then processed through Cee® developer systems to define patterned features. This sequence enables consistent film formation and reliable pattern transfer across a range of materials and applications. The use of an integrated coating, bake, and develop toolset supports repeatable processing in a multi-user environment, where maintaining consistency across different materials and workflows is essential.
